AI & Tech · Armonk and Albany
IBM unveils world's first sub-1nm chip, packing 100 billion transistors on a fingernail
IBM has revealed the world's first chip technology smaller than 1 nanometer, a 0.7nm transistor architecture that stacks components vertically to nearly double transistor density while cutting power use by 70%.
AI text based on reports by Observador, stern.de, Libertatea and other publishers. Published . How it is made
For membersThe first 30 seconds for everyone. Synthetic voice (AI).
In brief
IBM's 0.7nm transistor architecture is the first to break the 1-nanometer barrier, a milestone in semiconductor miniaturization.
The new architecture stacks transistors vertically, nearly doubling density to 100 billion transistors on a fingernail-sized chip.
The chip offers up to 50% more performance or 70% better energy efficiency over IBM's 2nm technology, with 40% SRAM scaling.
IBM expects the technology to be ready for manufacturing in the next five years, though it has not yet named a partner.
Analysts say the advance could add 10 to 15 years to the industry's ability to keep shrinking transistors, even as node names become symbolic.
- 2021IBM unveils 2nm chip technology
- 25 JunIBM announces 0.7nm nanostack chip
- 2026TSMC starts mass production of 2nm chips; Intel's 18A (1.8nm) moves to risk production
- 2031IBM projects production of 0.7nm chips could begin
IBM has unveiled what it claims is the world's first chip technology capable of producing semiconductors smaller than 1 nanometer. The 0.7-nanometer (7-angstrom) transistor architecture, announced on Thursday, packs nearly 100 billion transistors onto a fingernail-sized surface, roughly twice the density of the company's 2nm chip from 2021. The breakthrough comes as the semiconductor industry races to build chips for AI data centers, where power efficiency and performance are critical.
A new 3D architecture
The key to the shrinkage is a design IBM calls "nanostack." Instead of laying transistors flat on a silicon wafer, the approach stacks and staggers them vertically using 3D sequential integration. This allows engineers to fit more transistors into the same volume and even tune performance and power by using different material combinations in each stacked layer. IBM validated the architecture through dielectric bonding and demonstrated a working CMOS inverter, showing the structure can be physically built and can switch.
“With our new nanostack architecture, we're not just making smaller transistors, we're reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Performance and power gains
IBM reports that the 0.7nm node delivers up to 50% higher performance or up to 70% better energy efficiency compared to its 2nm generation. The company also presented results at VLSI 2026 showing 40% scaling in SRAM, the fast on-chip memory that is crucial for AI workloads. These gains address a core tension: demand for more computing power is colliding with energy constraints.
“Everyone demands more performance, but no one wants to pay for the power.”
- IBM 2nm (2021)
- 50 billion
- IBM 0.7nm (2026)
- 100 billion
Data from the article text
Industry race and Moore's Law
The announcement reinforces IBM's position in a field dominated by TSMC and Intel. TSMC recently began mass production of 2nm chips, while Intel last week said its 18A process (1.8nm) moved into risk production. The industry has long relied on Moore's Law, the observation that transistor density doubles roughly every two years. In recent years, engineers have turned to 3D designs to keep that trend alive. Analyst Dan Hutcheson of TechInsights called the advance "a big deal" that "basically puts another 10 or 15 years on the road map."
“This is a big deal. It basically puts another 10 or 15 years on the road map.”
Path to production
IBM does not manufacture chips itself. It licenses its technology to partners such as Samsung and Japan's Rapidus. The company says production of the 0.7nm technology could begin within five years, though no manufacturing partner has been announced. IBM's chip research is conducted at its Albany, New York, lab.
Ask about this text
Sources and context
- ObservadorIBM volta a encolher o tamanho dos chips
- stern.deLeistungssprung bei Mikrochips: IBM stellt neue Technologie vor
- LibertateaIBM anunță primele cipuri mai mici de un nanometru, o premieră mondială în cursa pentru dezvoltarea AI
- The Next WebIBM says it has built the first sub-1nm chip technology
- Jay Gambetta
- director of IBM Research and IBM Fellow
- Huiming Bu
- IBM vice president leading chip research and development
- Dan Hutcheson
- analyst at TechInsights
- Alan Woodward
- computer scientist at Surrey University
- Places
- Albany, New York City
Pollar is free and carries no ads in the text. Its members keep it going.
Support Pollar